AVB

• The core components (AVB Processor, AVB Endpoint, AVB Media Packetizer, and AVB Packet Receiver) are based from an AVNU AVB certified design.

• Relieves host processor of any AVB requirements

• Host processor legacy data pass-thru/multiplexing

• AXI Lite control interfaces for simple design integration

• Multiple Listener and/or Talker Support

• Media Clock Recovery

• Packet Filtering

• Media Encapsulation with IEEE1722 formats

• Uncompressed 48kHz/96KHz 8-channel Audio support

• Uncompressed/Compressed Video support

• Low Latency: 2ms Max Delay for Class A Traffic

• Characteristics of the system can be configured with an external AVDECC controller.

• Provides an AVB protocol stack including 802.1AS (PTP), 802.1QAT (MRP), 802.1QAV (packet shaping), MAAP, and IEEE1722.1 (Enumeration, Connection, and Control)

Figure 1 – High Level Diagram of AVB System Components

The AVB Endpoint is the interface that directs traffic to/from the Ethernet MAC. The traffic is in the form of either AV traffic, PTP traffic, or legacy traffic. PTP packet traffic is sent and received directly from dedicated Packet buffers. The AVB legacy traffic is a dedicated path for MSRP, 1722.1, and MAAP data.

TX Arbiter
The transmitter (Tx) arbiter selects data sent to the Ethernet MAC from the four sources. The AV path has the highest priority with a BW allowance based on a programmable Credit Based Shaper that is typically set to 75%. Next the Tx arbiter checks to see if there are any PTP packets to be transmitted. Finally, if there is an available legacy packet, then it is transmitted.

Receiver Splitter
The input to the splitter is connected directly to the client Receive (Rx) interface of the connected Ethernet MAC. The packet type is determined by parsing header data and is routed to the appropriate path. Host processor legacy data can be filtered based on programmable settings.

Precision Timing Protocol
The logic Precise Timing Protocol (PTP) blocks within the core provide the dedicated hardware to implement the IEEE P802.1AS specification. Full functionality is achieved using a combination of the hardware blocks coupled with functions provided by the Software Drivers run on the AVB processor.

• The RTC consists of a 32-bit nanosecond field and a 48-bit second field. With the protocol operation, the RTC becomes locked with all other nodes on the network.

• Transmit PTP packet buffer contains pre-initialized templates for seven different PTP packets defined by the P802.1AS.

• Received PTP Packets are written to the Rx PTP Packet Buffer by the Rx Splitter.

Figure 2 – AVB Endpoint

The AVB Embedded Processor is a standalone core that has an AVB stack responsible for maintaining the endpoint compliance with the other components in the system. It is also responsible for initial setup of the endpoint by accessing the endpoint’s attributes from memory outside the core (Flash).

Processor Supported Protocols

• 802.1AS (PTP) – defines a precise timing protocol based on the IEEE 1558v2 protocol. It allows every device connected to the network to share a common global clock. The protocol allows devices to have a synchronized view of this clock to within microseconds of each other, aiding media stream clock recovery and coordinated AVB traffic control.

• 802.1QAV – defines a standard for buffering and forwarding of traffic through the network using particular flow control algorithms. It uses the global clock provided by 802.1as to synchronize traffic forwarding and gives predictable latency control on media streams going through the network.

• 802.1QAT – defines a stream reservation protocol that provides end-to-end reservation of bandwidth across an AVB network.

• IEEE 1722 – defines an encapsulation protocol to transport audio streams over Ethernet. It is complementary to the AVB standards and in particular allows time stamping of a stream based on the 802.1as global clock.

• MAAP – MAC Address Acquisition Protocol -mechanism to dynamically allocate Multicast Talker MAC Addresses

• IEEE 1722.1 – defines how to discover, connect (Normal/Fast_connect), and control Audio Video Bridging Endpoint.

AVB Flash
Non-volatile Flash is used to define the Endpoint characteristics, including but not limited to the number of talkers, number of listeners, streamIDs, MAC addresses, and 1722.1 attributes.

RAM
The core can be configured to boot using BRAM as its main memory or as a bootloader to boot from DDR.

Figure 3 – AVB Embedded Processor

The basic purpose of the AVB Media Packetizer is to construct and transmit Ethernet AVB 1722 “Talker” packets using software-programmed registers and the incoming media framing characteristics. Encapsulation with IEEE1722 formats consist of header data followed by payload data. The header data is inserted on a packet-by-packet basis during stream generation. Static content of the header is programmed through the processor. Dynamic header fields may change for each packet of a given stream, and are therefore derived as the media is stored in the Packetizer. The payload data comes directly from the media interface and must be in a format defined by four control signals described in the next paragraph. Packets are sent on isochronous boundaries defined by an incoming 8 KHz clock.

Media Interface
The core allows for multiple media interfaces to exist in the system each of which is on their own clock domain. Each Media Interface has a 32-bit generic data input with a qualifier, respectively named Media_Data and Media_Wr_En. Qualifying signal Media_Block_Start and Media_Block_End indicate the first and last data words of a block of data.

The Media_Timestamp_En signal can be asserted at any time during a block (typically on the first word of the block), and is used to latch the current RTC Timestamp, and set the Timestamp Valid bit for the current packet within the packet header.

Packet Arbitration
A packet arbiter is used to switch between packets from multiple media interfaces. An 8 kHz clock is output from the Local Time Counter module. The 8 kHz clock defines the boundary of an isochronous cycle. This clock is used for shaping the time sensitive TX packets. The 8 kHz clock is created by observing the nanoseconds counter. The logic saves the current nanoseconds time and creates/toggles the 8 kHz clock edge.

Figure 4 – AVB Media Packetizer

The AVB Packet Receiver receives and processes IEEE 1722-compliant traffic from a MAC receiver. It has two main functions:

• Presenting a SW-configurable set of output media to downstream audio or video logic in a precisely timed manner.

• Using timestamp information to recover audio/video source timing that can be used to generate a “dirty” media clock.

Stream Filter
Packets are parsed and only passed on if they match a “Listener” stream ID in a sorted list of streams within the Stream Id Filter. A match also provides information of where the stream contents should be routed. The routing location indicates the media interface and the channel position in an outgoing buffer.

Media Interface
The media buffer is used for storing data until the RTC equals the timestamp associated with the data. This buffer typically uses on-chip RAM. A media clock is recovered from each single media interface. This media clock is considered “dirty” because it is derived from the recovered RTC. The RTC is continually being corrected so that it is synchronized with all other nodes on the AVB network. The media clock is recovered from timestamps that are embedded in an incoming stream.

Media outputs follow the following timing:

The core allows for multiple media interfaces to exist in the system each of which is on their own clock domain. Each Media Interface has a 32-bit generic data output with a qualifier, respectively named Media_Data and Media_Valid. Qualifying signal Media_Block_Start and Media_Block_End indicate the first and last data words of a block of data.

Figure 5 – AVB Media Packet Receiver